A New Heuristic for PCBs Grouping Problem with Setup Times

dc.contributor.author	Huang, J.P.
dc.contributor.author	Pan, Q.K.
dc.contributor.author	Tasgetiren, M.F.
dc.contributor.author	Huang, Y.Y.
dc.contributor.editor
dc.date.accessioned	2021-01-25T20:47:55Z
dc.date.available	2021-01-25T20:47:55Z
dc.date.issued	2020
dc.identifier	10.23919/CCC50068.2020.9188727
dc.identifier.issn	19341768
dc.identifier.uri	https://www.scopus.com/inward/record.uri?eid=2-s2.0-85091401885&doi=10.23919%2fCCC50068.2020.9188727&partnerID=40&md5=9c82d449bf0f55a0bd761b1d65abcb06
dc.identifier.uri	https://dspace.yasar.edu.tr/xmlui/handle/20.500.12742/9617
dc.description.abstract	In this paper, we present a new heuristic to divide a batch of printed circuit boards (PCBs) into subgroups to save the setup time for loading and unloading components from the assembly machine. In the heuristic, we propose several concepts about similari
dc.language.iso	English
dc.publisher	Chinese Control Conference, CCC
dc.title	A New Heuristic for PCBs Grouping Problem with Setup Times
dc.type	Conference Paper
dc.relation.firstpage	1495
dc.relation.lastpage	1500
dc.relation.volume	2020-July
dc.description.affiliations	Shanghai University, School of Mechatronic Engineering and Automation, Shanghai, 200072, China; Yasar University, International Logistics Management Department, Izmir, Turkey

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